1. Field of the Invention
The instant disclosure relates to a current-mode buck converter; in particular, to current-mode buck converter smoothly switched between a pulse width modulation mode and a pulse frequency modulation mode.
2. Description of Related Art
The electronic device usually comprises different components, and operating voltages of each component are different. Therefore, the electronic device is able to achieve regulation of the voltage level through a DC-to-DC voltage conversion circuit, and make the voltage be stabilized at a preset voltage value. According to different power requirements, it may be extended to many different types of DC-DC voltage conversion circuit, e.g. Buck/Step Down Converter and Boost/Step Up Converter. Furthermore, buck/step down converter may make the DC voltage of the input terminal decrease to a preset voltage level, and boost/step up converter may elevate DC voltage of the input terminal. There are many case of buck/step down converter or boost/step up converter has already evolved for adapting different architecture or meeting different demands as evolution of the circuit technology.
For example, referring to FIG. 1, FIG. 1 shows circuit schematic view of the current-mode buck converter according to prior art. The current-mode buck converter comprises an oscillator 110, an input terminal IT′, an output terminal OT′, a feedback module 160, a switch module 150, a current detecting circuit 130, a slope compensating circuit 140, a detection resistor RU, an error amplifier E1′ a modulation compensating circuit 170, a first comparator COP1′, a modulation control circuit 120, a zero-crossing detecting circuit ZT′, a current source ISET and a resistor RS. The modulation compensating circuit 170 comprises a compensation switch S1′, a compensation resistor ROP′ and a compensation capacitor COP′. The feedback module 160 comprises a first resistor R1′ and a second resistor R2′. The switch module 150 comprises a buffer amplifier 152, an up-bridge switch transistor MP′ and a down-bridge switch transistor MN′, wherein the up-bridge switch transistor MP′ is a P type metal-oxide semiconductor transistor and the down-bridge switch transistor MN′ is an N type metal-oxide semiconductor transistor.
In prior art, the current-mode buck converter 100 receives an input voltage VIN′ via an input terminal IT′, and outputs an output voltage VOUT′ via an output terminal OT′. The feedback module 160 generates a feedback signal VFB′ according to the output voltage VOUT′. The switch module 150 determines an electrical connection of the input terminal IT′, a ground voltage GND′ and the output terminal OT′ according to a next-stage switch signal SWB′. The current detecting circuit 130 amplifies an input current ISNP′ received so as to generate an image current ISP′. The slope compensating circuit 140 receives a pre-stage switch signal SW′ and operates correspondingly according to the pre-stage switch signal SW′, and then generates a slope compensating current ISC′ accordingly. The current-mode buck converter 100 gather the image current ISP′ and the slope compensating current ISC′ via an adder AD′ and then it flows into one terminal of the detection resistor RU so as to generate a detection voltage VC′. The detection voltage VC′ is electrically connected to an input terminal of the first comparator COP1′. The error amplifier E1′ is used for amplifying a difference of the feedback signal VFB′ and the first reference voltage VREF1′ so as to generate a difference voltage ΔV′. The modulation compensating circuit 170 compensates frequency response of the current-mode buck converter 100 according to the difference voltage ΔV′, and accordingly generates a compensation voltage EAO′, wherein one terminal of the compensation switch S1′ of the modulation compensating circuit 170 is switched and connected to one of the PWM terminal T1′ and the PFM terminal T2′ according to a mode switch signal PF′. The first comparator COP1′ receives the detection voltage VC′ and the compensation voltage EAO′ and compares the detection voltage VC′ with the compensation voltage EAO′, so as to the PWM signal PS′. The modulation control circuit 120 is used for generating the pre-stage switch signal SW′ according to the PWM signal PS′ and the oscillation signal VOSC′, wherein the oscillation signal VOSC′ is generated from the oscillator 110. The zero-crossing detecting circuit ZT′ is used for detecting a source current ISNN′ of the down-bridge switch transistor MN′, and transmits the mode switch signal PF′ to the modulation control circuit 120, the compensation switch S1′, the current detecting circuit 130 and the slope compensating circuit 140 according to a detection result.
However, when the current-mode buck converter 100 is changed from the pulse width modulation (PWM) mode to the pulse frequency modulation (PFM) mode, one terminal of the compensation switch S1′ is switched and connected to the PFM terminal T2′ from the PWM terminal T1′ so as to receive a constant voltage FV. Because, a fixed current is generated from the current source ISET, a constant voltage FV is generated at the PFM terminal T2′ when the fixed current flows through a fixed resistor RS, wherein the constant voltage FV does not carry any information about the detection voltage VC′ and the compensation voltage EAO′. Accordingly, when the current-mode buck converter 100 is switched between the PFM mode and the PWM mode, the output voltage VOUT′ will be not stable or be oscillated between the PFM mode and the PWM mode.